“With the rapid development of Electronic technology, more and more people have joined the army of electronic development. In the process of learning electronic technology and R&D projects, it is unavoidable to use some instruments, such as multimeters, oscilloscopes, etc. However, for some non-enthusiasts, it is more “” to have a digital oscilloscope. The digital oscilloscope introduced in this design has the advantages of low cost, simple production, and high measurement, which precisely meets the needs of this group of people.
With the rapid development of electronic technology, more and more people have joined the army of electronic development. In the process of learning electronic technology and research and development projects, it is inevitable to use some instruments, such as multimeters, oscilloscopes, etc. However, for some non-enthusiasts, it is more “” to have a digital oscilloscope. The digital oscilloscope introduced in this design has the advantages of low cost, simple production, and advanced measurement, which precisely meets the needs of this group of people.
It is easy to make an oscilloscope, but it is not easy to make an oscilloscope with a high analog input bandwidth. The choice of main components is the key to achieving the design goal of high analog input bandwidth. This text chooses C8051F020 one-chip computer as CPU, it has simple 51 kernels and abundant I/O resources. A/D selects 8-bit high-speed analog/digital converter TDA8703, the sampling rate is 40 Msps. In addition, dual-port FIFO-IDT7202LA-12 is adopted, which is a first-in first-out dual-port memory with a fast storage time of 12 ns.
This system mainly includes front-end analog signal circuit conditioning module, signal acquisition circuit module, signal transmission module, logic control circuit module of each chip, Display module, etc.
1. Front-end analog signal circuit conditioning module
This module uses high-speed operational amplifier LM6361 and high-speed comparator AD744, as shown in Figure 1.
This design uses a finished probe. In order to prevent overvoltage input, two protection diodes are added to the front end of the high-speed comparator AD744 to clamp the input signal to ±12 V, which protects the entire system. Then through ICI reverse amplification, and then through IC2 to reverse the phase to the original phase of the signal. Because the AD voltage input range used in this design is 1.55- 3.26 V, IC3 is used to add a DC component to “lift” the input signal to the A/D input range.
2. Signal acquisition circuit module
The A/D converter that this module adopts is TDA8703. It is a high-speed analog/digital converter produced by Philips, with a sampling rate of 40 Msps, 8-bit resolution, high signal-to-noise ratio, compatible with TTL levels, and an internal reference voltage.
The input voltage and output binary code of TDA8703 are listed in Table 1, and the sampling sequence is shown in Figure 2.
The sampling starts when the rising edge of the clock arrives, and the conversion ends when the rising edge of the next cycle of the clock rises. Due to the sampling rate of up to 40 Msps, it is difficult for ordinary single-chip computers to “keep up with the rhythm”. At this time, dual-port RAM-IDT7202 is used in conjunction with it to achieve the purpose of synchronization with the single-chip. IDT7202 is a first-in/first-out dual-port memory introduced by AMD. The model selected for this design is IDT7202-12, that is, the data storage time is 12 ns, that is, the storage frequency is up to 83 MHz, which can fully match the 40 Msps AD, so the two chips can be sampled and stored with the same clock ( As shown in Figure 3). IDT7202 has a memory depth of 1,024 bytes, low power consumption, CMOS technology, 3 status flags (empty, half full, full), and industrial temperature (-40～80℃).
The sampling clock of TDA8703 and the write signal of IDT7202 are connected to the same clock, so that the two are synchronized. When 1 024 points are sampled, the sampling clock signal is turned off, and the FF terminal of IDT7202 is active at low level. The CPU takes out the data in IDT7202 and queries the empty flag terminal of IDT7202; when low is active, it means that the data in IDT7202 is all When it is taken out, the sampling clock signal is restarted at this time, and the previous process is repeated.
Because this design uses a PC and is limited by the serial port upload baud rate, it is difficult to measure high-frequency signals. The above design just solves this problem to a certain extent. Since 1,024 sampling points are continuous, they can be uploaded gradually to form a complete waveform. However, the ADC prohibits sampling during the uploading of 1,024 sampling points to the PC, so the waveform seen on the PC has discontinuous “connectors”. However, this can be “tolerated” for a simple digital storage oscilloscope.
In the design process, due to too many wires, PCB boards have to be made even in the test phase; but because the control logic between the chips is uncertain, it is easy to make mistakes. At this time, CPLD is used to build the logic circuit of this system. Once an error occurs, it can be modified at any time until it is correct. If the entire system is successfully debugged, replace the CPLD with logic circuits such as AND, OR, and NOT, which can reduce costs.
3. Signal transmission module
The CPU responsible for signal transmission in this design is C8051F020. The C8051F series single-chip microcomputer is a fully integrated mixed-signal system-on-chip. It has a 8051-compatible controller core and is compatible with the MCS-51 instruction set; in addition to the standard 8051 digital peripheral components, the chip also integrates data acquisition and control Commonly used analog components and other digital peripherals and functional components in the system. C8051F single chip microcomputer adopts pipeline structure, the machine cycle is reduced from the standard 12 system clock to 1 system clock cycle, the processing capacity is greatly improved, and the peak performance can reach 25 MIPS.
The C8051F microcontroller is a system on chip (SoC) that can truly work independently. Each MCU can effectively manage analog peripherals and digital peripherals, and can turn off individual or all peripherals to save power. Flash memory also has on-chip reprogramming capabilities, can be used for non-volatile data storage, and allows on-site update of 8051 firmware.
The on-chip JTAG debugging support function allows the use of the product MCU installed on the final application system to perform non-intrusive (do not occupy system resources), full-speed, and in-system debugging. The debugging system supports observation and modification of memory and registers, and supports breakpoint, single step, run, and stop commands. When using JTAG to debug, all analog and digital peripherals can be fully functional.
C8051F has standard 8051 compatible I/O ports. Some ports do not have pins in some devices, and such ports can be used as general-purpose registers. The working condition of I/ O port is similar to 8051, but some improvements. Each port I/O pin can be configured as push-pull or open-drain output. The fixed “weak pull-up” in the standard 8051 can be disabled, which provides further power saving capabilities for low-power applications. The outstanding improvement is the introduction of a digital crossbar switch. This is a large digital switch network that allows internal digital system resources to be allocated to port I/O pins. Unlike the microcontroller with standard multiplexed digital I/O, this structure can support all functional combinations.By setting the cross switch control register, the on-chip counter/timer, serial bus, hardware interrupt, ADC conversion start input and other digital signals inside the microcontroller can be set.
The 40 MHz crystal oscillator is divided into 8 different frequencies, so that the sampling rate of the ADC can be adjusted to adapt to different measured signals. Pay attention to the routing of this part of the circuit when making the PCB, and the distance between the active crystal oscillator and the ADC should not exceed 1 000 mil (2.54 cm). In addition, when making the PCB, the digital ground and the analog ground should be separated, and an O Ω resistor should be used to cross it; the two sides are “grounded”, which can greatly improve the reliability of the PCB.
The advantage of this design is that a cost-effective oscilloscope can be produced at a lower cost, which can well meet the needs of students or amateur electronics enthusiasts with insufficient funds. After testing, the whole system is very stable. When measuring a square wave, the sampling rate is 5 to 8 times the frequency of the signal under test, so that the effect can be achieved.