Maintain efficient and reliable design solutions in power systems

Capacitance at the input of a DC-DC converter plays an important role in maintaining the stability of the converter and helps filter electromagnetic interference (EMI) at the input. The large capacitance at the output of the DC-DC converter presents a formidable challenge to the power system. Many downstream loads of DC-DC converters require capacitors to function properly. These loads can be pulsed power amplifiers or other converters that require capacitance at the input. If the capacitance value at the load exceeds the limit that the DC power system is designed to handle, the current of the power system may exceed its maximum rating during startup and normal operation.Capacitors can also cause power system stabilization

Capacitance at the input of a DC-DC converter plays an important role in maintaining the stability of the converter and helps filter electromagnetic interference (EMI) at the input. The large capacitance at the output of the DC-DC converter presents a formidable challenge to the power system. Many downstream loads of DC-DC converters require capacitors to function properly. These loads can be pulsed power amplifiers or other converters that require capacitance at the input. If the capacitance value at the load exceeds the limit that the DC power system is designed to handle, the current of the power system may exceed its maximum rating during startup and normal operation. Capacitors can also cause power system stability problems, leading to erroneous system operation and premature power system failure.

When it comes to powering large capacitive loads, implementing a few simple techniques in the power system to keep the power at it can maintain an efficient and reliable design. Shortening the voltage rise time applied across the load capacitor at startup can keep the current of the power system within its rated range, and controlling the charging current flowing into the capacitor during normal operation can keep the power system within its rated range, while adjusting the control loop of the system The circuit can maintain the stability of the power system and keep the voltage of the power system within its rated range.

Startup Considerations

At power system startup, typical DC-DC converters have a standard rise time determined by the rise time of the internal error amplifier reference. A discharge capacitor placed at the output of the converter will present a low impedance load. With this low output impedance, a few switching cycles of the converter can cause a high enough voltage change across the capacitor and force the converter output current to exceed its rating. This capacitor can be precharged through a higher impedance path at the output of the converter. This high impedance element will limit the charging current into the capacitor until the capacitor is charged to a pre-defined voltage value. Once a predefined voltage value is reached, the high impedance path can be removed or shorted with a low impedance device such as a FET.

The converter can supply the maximum rated current through this lower impedance path. When the FET shorts this impedance path, the full-scale voltage of the converter is allowed to charge the capacitor. The on-time of the FET and the voltage difference between the capacitor and the converter voltage determine the charge current required to charge the capacitor to full voltage, so setting a predefined voltage value such that the FET is on will not cause the converter to exceed its voltage. That point of rated current is very important. The block diagram shown in Figure 1 can be used to charge the capacitor to a preset minimum voltage. U2 is used to control the FET to short the resistance Z if necessary, and the U1 circuit is used with U2 to set the turn-on voltage and load enable.

Maintain efficient and reliable design solutions in power systems

Figure 1: Block Diagram of Capacitor Precharge

At startup, the converter sees the capacitor as a load and the system load after the capacitor. If the system load draws current from the capacitor during high impedance precharging, the capacitor may not reach the preset charging voltage. Many downstream loads of DC-DC converters have undervoltage lockout capabilities, in which they require very little current. If the load does not have undervoltage lockout above the preset charging voltage, then an external enable signal should be used. If the load itself is resistive, a series switch can be used to enable the voltage to the load after the capacitor has been charged. Figure 2 shows the voltage and current of a system charging a 10mF capacitor.

Maintain efficient and reliable design solutions in power systems

Figure 2: 12V DC converter charging a 10KuF capacitor

Once the capacitor is charged, the load can begin to draw current from the capacitor and the DC-DC converter. Some loads require fast access to current, and if this requirement exceeds the converter’s bandwidth capability, the current will be supplied by the capacitor. Once the current is supplied by the capacitor, the voltage across the capacitor drops:

where Vdrop is the voltage drop across the capacitor, I is the required current value, C is the capacitor value, and dt is the duration for which the current is drawn. The converter will recharge the capacitor to its original value, and in doing so, the converter output current may exceed its rated value. The voltage difference between the converter and the fully discharged capacitor divided by the resistance between the two voltages determines the desired recharge current. To reduce system losses, the resistance between the two voltages is usually low, so the desired recharge current may be higher than the converter’s maximum value. Since the capacitor voltage is close to the converter’s set point voltage, exceeding the converter’s maximum current value may also mean exceeding the converter’s maximum power value.

To prevent the converter from exceeding its current and power rating during normal operation, the current control block diagram in Figure 3 can be used to control the recharge current after a high di/dt event. This circuit monitors the current across the shunt resistor and limits the recharge current by actively reducing the converter voltage. This limited voltage difference between the converter and the capacitor will limit the recharge current of the capacitor, thus keeping the converter within its current and power limits. As the capacitor voltage rises, the converter voltage also rises until it reaches its set value.

Maintain efficient and reliable design solutions in power systems

The current limiting method shown in Figure 3 can be used in conjunction with the precharging method in Figure 1 to achieve a faster start-up process. A precharge circuit can charge the capacitor to the minimum regulation voltage of the converter, and the converter then charges the capacitor at full speed at the maximum rated current. Controlling the rising rate of the output voltage can achieve the purpose of controlling the current that charges the capacitor. However, most DC-DC converters have only a narrow control or adjustment range from their nominal voltage setting. A typical adjustment interval is ±10%. Some manufacturers offer wider adjustment ranges, and converters can even adjust down to -90% of the nominal set voltage. The smaller the voltage regulation range, the less demanding the enabling circuit is, since downstream loads typically have undervoltage lockout near their operating voltage minimum.

Maintain efficient and reliable design solutions in power systems

Figure 3: Block Diagram of External Current Limit

Stability Considerations

Once the converter is kept within its limits during start-up and operation, then we must ensure the stability of the system. Large capacitance at the output of the DC-DC converter can reduce the phase margin of the system, causing ringing. In order to ensure the stable operation of the converter, there must be a minimum value of resistor and capacitor used in series. The lead or wire resistance, the equivalent series resistance of the FET and capacitor are all active components of this resistance. The best way to find this resistance minimum is to use a network analyzer and run a system analysis function to determine the phase and gain margins. If a network analyzer is not available, a step load can also be connected in the system to analyze the voltage and current waveforms of the converter, ensuring that there is no excessive ringing that could represent poor stability.

Once the voltage loop has stabilized, the current control loop in Figure 3 can be examined to analyze its effect on system stability. This current control loop is located within the control loop of the DC-DC converter, and its bandwidth should be much smaller than the crossover frequency of the system loop, so the two loops do not interact. In converter systems where the power compensation network is integrated inside the converter, the converter manufacturer can provide enough information to set an appropriate crossover frequency for the current control loop. Some converter manufacturers allow designers to optimize performance for specific applications by tuning the power control loop.

Figure 4 shows a converter with an external control loop. This control loop can be optimized to provide peak system performance. This outer control loop is important in applications where the response time of the power system is critical to proper system operation. This is the case in periodic pulsed load applications, where the converter must recharge the capacitor before the next power pulse. The stability of the system should be verified with a network analyzer or step load test. An unstable system can produce voltage excursions beyond the ratings of the power system components, eventually leading to power system failure.

Maintain efficient and reliable design solutions in power systems

Author: Yoyokuo