Manipulate the MCU SPI interface to access non-standard SPI ADCs

Question: Can the MCU be used to access non-standard SPI interfaces?

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Answer: Yes, but some extra effort may be required.

Introduction

Many of today’s precision analog-to-digital converters (ADCs) have a serial peripheral interface (SPI) or some sort of serial interface to communicate with controllers including microcontroller units (MCUs), DSPs, and FPGAs. The controller writes or reads the ADC internal registers and reads the conversion code. SPI’s printed circuit board (PCB) layout simplicity and faster clock rates than parallel interfaces have made it increasingly popular. Also, it is easy to connect the ADC to the controller using standard SPI.

Some newer ADCs have SPI, but some have non-standard 3-wire or 4-wire SPI as a slave because they want faster throughput rates. For example, the AD7616, AD7606, and AD7606B families have two or four SDO lines to provide faster throughput rates in serial mode. The AD7768, AD7779, and AD7134 families have multiple SDO lines that act as SPI masters. Users often have difficulty designing microcontroller SPI to configure ADC and read code.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 1. The AD7768 acts as a serial master with two data output pins (14001-193).

Standard MCU SPI connection to ADC

SPI is a synchronous, full-duplex, master-slave interface. Data from the master or slave is synchronized on the rising or falling edge of the clock. The master and slave can transmit data at the same time. Figure 2 shows a typical 4-wire MCU SPI interface connection.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 2. Standard MCU SPI connection to ADC slave

To start SPI communication, the controller must send a clock signal and select the ADC via an enable signal (usually an active low signal). SPI is a full-duplex interface, so the controller and ADC can output data simultaneously through the MOSI/DIN and MISO/DOUT lines, respectively. The controller SPI interface allows the user the flexibility to select the rising or falling edge of the clock to sample and/or shift data. For reliable communication between master and slave, the user must adhere to the digital interface timing specifications of the microcontroller and ADC chip.

If the microcontroller SPI and ADC serial interfaces have standard SPI timing modes, it is not a problem for the user to design the PCB layout and develop the driver firmware. However, the serial interface ports of some newer ADCs are not in typical SPI timing mode. It seems impossible for an MCU or DSP to read data through the AD7768 serial port, a non-standard timing SPI port, as shown in Figure 4.

This article will describe methods for manipulating standard microcontroller SPI to interface with ADCs with non-standard SPI ports.

This article will give four solutions to read ADC code through serial interface:

uSolution 1: The MCU acts as the SPI slave, and interfaces with the ADC as the SPI master through a DOUT line.

u Solution 2: The MCU acts as an SPI slave and interfaces with the ADC as the SPI master through two DOUT lines.

u Solution 3: The MCU acts as the SPI slave and interfaces with the ADC as the SPI master through DMA.

uSolution 4: MCU acts as SPI master and SPI slave to read data through two DOUT lines.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 3. Example of SPI Data Clock Timing Diagram

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 4. AD7768 FORMATx = 1× Timing Diagram, Output Through DOUT0 Only.

STM32F429 microcontroller SPI reads AD7768 code through a DOUT line

As shown in Figure 4, when FORMATx = 11 or 10, Channel 0 to Channel 7 output data only through DOUT0. In standard operating mode, the AD7768/AD7768-4 operates as a master, with data flowing into the MCU, DSP, or FPGA. The AD7768/AD7768-4 provide data, a data clock (DCLK), and a falling edge frame enable signal (DRDY) to the slave.

The STM32Fxxx family of microcontrollers is widely used in many different applications. This MCU has multiple SPI ports and can be configured as SPI master or slave using typical SPI timing modes. The method described below can also be applied to other microcontrollers with 8-bit, 16-bit or 32-bit frames.

The AD7768/AD7768-4 are 8-channel and 4-channel simultaneous sampling Σ-Δ ADCs, each channel has a Σ-Δ modulator and digital filter, and supports simultaneous sampling of AC and DC signals. These devices achieve 108 dB dynamic range at a maximum input bandwidth of 110.8 kHz, with typical performance of ±2 ppm INL, ±50 µV offset error, and ±30 ppm gain error. The AD7768/AD7768-4 user can trade off input bandwidth, output data rate, and power consumption, and select one of three power modes to optimize noise targets and power consumption. The flexibility of the AD7768/AD7768-4 makes it a reusable platform for low-power DC and high-performance AC measurement modules. Unfortunately, the serial interface of the AD7768 is not in typical SPI timing mode, and the AD7768 acts as a serial interface master. Generally speaking, users must use FPGA/CPLD as their controller,

For example, use the 32F429IDISCOVERY and AD7768 evaluation board. The connection of the alternate SPI line is shown in Figure 5. With this setup, all eight channels of data from the AD7768 are output only through DOUT0.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 5. AD7768 outputs data to STM32F429 MCU SPI connection via DOUT0

issues that need resolving:

AD7768 is used as SPI master, so STM32F429I SPI must be configured as SPI slave.

The high pulse lasts only one DCLK cycle, which is not typical.

After completing the output of all channel data bits, DCLK continues to output and is low.

Solution 1: MCU SPI as a slave to interface with the SPI master ADC through a DOUT line

Configure one of the SPI ports of the STM32F429 (such as SPI4) as a slave to receive data bits on MOSI at the DCLK rate.

Connect AD7768 to STM32F429 external interrupt input pin EXTI0 and NSS (SPI ) pin. The rising edge of will trigger the EXTI0 processing routine to enable the SPI slave to begin receiving data bits on the first DCLK falling edge after going low. Timing design is critical here.

After all data from channel 0 to channel 7 has been received, the SPI should be disabled to prevent additional invalid data from being read, as the SPI slave will be driven low and DCLK will remain toggled.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 6. AD7768 Data Bit Read in Timing Solution

MCU Firmware Development Considerations

When software is in interrupt mode, DCLK can run at rates up to 4 MHz, achieving an ODR of 8 kSPS. Software should enter the interrupt handler to start the SPI within one half DCLK cycle (375 ns). To make it easier for software to enter the interrupt routine, the MCU can read data on the rising edge of DCLK, providing an additional half of the DCLK cycle time. However, the t5 DCLK rise to DOUTx invalid minimum is –3 ns (–4 ns at IOVDD = 1.8 V), so the propagation delay on DOUTx (>|t5| + MCU hold time) should be increased by PCB routing or buffering.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 7. Configuring the SPI4 peripheral

Solution 2: MCU SPI as a slave to interface with the SPI master ADC through two DOUT lines

In the first solution, only DOUT0 is used to output all 8 channels of data. Therefore, the data read limits the ADC throughput rate to 8 kSPS. As shown in Figure 1, outputting channel 0 to channel 3 on DOUT0 and outputting channel 4 to channel 7 on DOUT1 can reduce the data transmission time. The serial line connections are shown in Figure 7. With this improvement, the ODR can easily reach 16 kSPS when DCLK is 4 MHz.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 8. AD7768 outputs data to STM32F429 MCU SPI connection via DOUT0 and DOUT1

Firmware can use polling mode instead of interrupt mode to reduce the time delay from rising edge trigger to enabling SPI to receive data. This achieves an ODR of 32 kSPS with a DCLK of 8 MHz.

Solution 3: MCU SPI as slave, interface with SPI master ADC via DMA

Direct Memory Access (DMA) is used to provide high-speed data transfer between peripherals and memory and between memory and memory. DMA can move data quickly without any MCU operation, which frees up MCU resources for other operations. Below is the design description of the MCU SPI used as a slave to receive data via DMA.

Solution 4: MCU SPI as master and slave, read data through two DOUT lines

High throughput or multi-channel precision ADCs provide two, four or even eight SDO lines to the SPI port for faster code reading in serial mode. For microcontrollers with two or more SPI ports, these SPI ports can run concurrently to speed up code reading.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 9. EXTI0 is in polling mode, SPI4 and SPI5 receive AD7768 data bits through DOUT0 and DOUT1.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 10. EXTI0 in polling mode, SPI4 DMA receives AD7768 data bits through DOUT0.

In the following use case, 32F429IDISCOVERY uses SPI4 as SPI master and SPI5 as SPI slave to receive EVAL-AD7606B-FMCZ data through DOUTA and DOUTB, as shown in Figure 8.

The AD7606B is a 16-bit simultaneous sampling analog-to-digital data acquisition system (DAS) with eight channels, each containing analog input clamp protection, programmable gain amplifier (PGA), low-pass filter, and 16-bit sequential Approximation register (SAR) type ADC. The AD7606B also includes a flexible digital filter, low-drift 2.5 V precision voltage reference and reference buffer to drive ADCs and flexible parallel and serial interfaces. The AD7606B operates from a single 5 V supply, supports true bipolar input ranges of ±10 V, ±5 V, and ±2.5 V, and can sample at a throughput rate of 800 kSPS on all channels.

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 11. Receive data via DOUTA and DOUTB using MCU SPI in master-slave mode

Manipulate the MCU SPI interface to access non-standard SPI ADCs

Figure 12. SPI4 configured as master and SPI5 configured as slave.

Figure 13 shows a screenshot of the digital interface of the AD7606B running at 240 kSPS for BUSY, SCLK, DOUTA, and DOUB.

Figure 13. Oscilloscope Screenshot of AD7606B BUSY, SCLK, and Data on DOUTA and DOUTB

in conclusion

This article discusses the use of microcontroller SPI to access ADCs with non-standard SPI interfaces. These methods can be used as-is or with a little tweaking to control the ADC SPI; it can be used as an SPI master, or it can be used with multiple DOUT lines to increase throughput rates.

Thanks

Many thanks to Mika Jiang and Yao Zhao, Application Engineers, for their advice on quick start and firmware debugging efforts of the STM32F429IDISCOVERY kit.

Author: Yoyokuo