MIPI D-PHY physical layer automatic compliance test

The need for low-power high-definition displays is driving the adoption of high-speed serial buses, especially in mobile devices. MIPI D-PHY is a standard bus designed for transferring data between application processors, cameras and displays. The standard is supported by the MIPI Alliance, an association of companies, primarily from the mobile device industry.

The need for low-power high-definition displays is driving the adoption of high-speed serial buses, especially in mobile devices. MIPI D-PHY is a standard bus designed for transferring data between application processors, cameras and displays. The standard is supported by the MIPI Alliance, an association of companies, primarily from the mobile device industry. The standard is used by consortium members, and conformance testing plays an important role in ensuring reliable operation of equipment and interoperability among manufacturers. Automated test systems use reliable oscilloscopes and probes to help designers test faster, improve repeatability, and simplify reporting.

High-speed physical layer

The physical layer of D-PHY consists of one clock and four data paths[D0:D3]composition that can run at very high speeds. The physical layer can support different protocol layers. For example, the image captured by the camera can be transmitted to the processor through the D-PHY physical layer using the CSI-2 protocol, to the application processor, and then to the Display through the D-PHY physical layer using the DSI protocol. CSI and DSI here refer to the protocols running on D-PHY. The data transmission rate on each channel can reach 2.5 Gbps when using the V1.2 standard, and can reach 4.5 Gbps when using the V2.1 standard, so that high-resolution and high-definition images can be transmitted.

data path[D0:D3]The D0 path is a bidirectional path and is used for the bus turnaround (BTA) function. When the master transmitter asks for a response from the peripheral, it sends a request to its PHY at the end of the transfer, telling the PHY layer to acknowledge the bus turnaround (BTA) command after the end of transfer (EoT). The rest of the lanes and clocks are unidirectional, and data is stripped in different lanes. For example, the first byte will be transmitted on D0, then the second byte will be transmitted on D1, and so on, the fifth byte will be transmitted on D0. According to the design requirements, the data path structure can be expanded from one to four. Figure 3 is a diagram of data stripping on a 1-clock 3-way system. Each lane has an independent start of transmission (SoT) and end of transmission (EoP), and the SoT is synchronized across all lanes. However, some paths may complete HS transmission (EoT) before others.

Between the four lanes, the maximum throughput of D-PHY 1.2 signaling is approximately 10 Gbps when operating at 2.5 Gbps/lane. There are two modes of physical layer signaling: high speed (HS) mode and low power (LP) mode.high speed[HS]Mode is used to transfer data quickly.When the system is idle, low power[LP]Modes are used to transmit control information to extend battery life. HS and LP modes have different terminations, and the system should be able to dynamically change the terminations to support both modes.

The higher the speed of the HS data, the higher the resolution the monitor can support, and the better the image clarity. There are several other parameters to look at for the relationship between data rate and resolution.

Pixel clock: determines the rate at which pixels are transmitted

Refresh rate: the number of times the screen refreshes per second

Color depth: The number of bits used to represent the color of a pixel

The derivation formula of pixel clock is as follows: Pixel clock = number of horizontal samples x number of vertical lines x refresh rate. The number of horizontal samples and vertical lines includes horizontal and vertical blanking intervals.

MIPI D-PHY physical layer automatic compliance test

Figure 1. Modes and states of the D-PHY datapath in continuous clock mode. (MIPI Alliance D-PHY Specification Version 1.2, MIPI Alliance Corporation)

MIPI D-PHY physical layer automatic compliance test

Figure 2. Modes and states of the D-PHY clock path in normal clock mode. (MIPI Alliance D-PHY Specification Version 1.2, MIPI Alliance Corporation)

How to test electrical interface signaling?

Data is transmitted in HS mode, and when the line is idle, the transmitter switches to a low power mode to save energy. In high-speed (HS) mode, the differential voltage is 140 mV minimum, 200 mV nominal, and 270 mV maximum, extending the data rate to a maximum of 2.5 Gb/s. The HS mode consists of two possible states: Differential-0 (HS-0) and Differential-1 (HS-1).

In low power (LP) mode, signaling uses two single-ended lines with a 1.2 V swing and a maximum operating data rate of 10 Mb/s. The data+(Dp) line and the data-(Dn) line are independent of each other. Each line can have two states: 0 and 1, which results in LP mode, which has four possible states: LP-00, LP-01, LP-10, LP-11.

To accommodate the two different modes of operation, the termination at the receiver must be dynamic. In HS mode, the receiver must be differentially terminated to 100 Ω; in LP mode, the receiver is open (unterminated). The rise time in HS mode is different from that in LP mode.

Dynamic termination at the receiver side increases the complexity of D-PHY signal testing, which brings great challenges to detection. The probe must be able to switch seamlessly between HS and LP signals without loading the DUT. Most global timing parameters must be measured in HS entry mode, which needs to be performed as clock-only tests, data-only tests, and clock-to-data tests. Also acquire Clock+ (Cp), Clock- (Cn), Data+ (Dp), Data- (Dn) simultaneously on different channels of the oscilloscope.

Given that the maximum speed supported by the D-PHY1.2 specification is 2.5 Gbps, the minimum required bandwidth is 8 GHz, and the probe should be stable below 8 GHz to be able to capture HS-LP and LP-HS transitions waveform in the area.

D-PHY is becoming a popular standard in automotive display and camera applications. Testing in different automotive temperature ranges can also present challenges, especially when it comes to probing.

Automated Conformance Testing with MSO6

The minimum bandwidth required for oscilloscopes and probes is 4 GHz. At the maximum data rate of 2.5 Gbps, the recommended bandwidth for the oscilloscope and probe is 8 GHz. Setup includes: oscilloscope, 4 low-load single-ended probes, TekExpress D-PHY 1.2 automated test solution, advanced jitter analysis (recommended), probing, terminating the board.

The TekExpress solution integrates the fastest automated test solution with 6 Series MSO, MSO/DPO7000/DX and DPO70000SX oscilloscopes. TekExpress software provides a graphical user interface (GUI) architecture that includes an intuitive workflow from setup to test, regardless of which path termination is used. Perform compliance measurements while operating online, and configure settings, adjust limits, and tailor for specific DUT data rates. On instruments configured with advanced jitter analysis (Option DJA), the TekExpress D-PHY solution draws eye diagrams for data-to-clock delay testing, clearly indicating the delay information between data and clock.

MIPI D-PHY physical layer automatic compliance test

Figure 3. Single-Ended Test Setup Using a 6 Series MSO

MIPI D-PHY physical layer automatic compliance test

Figure 4. Eye diagram used in the HS-TX clock-to-datapath timing test.

The TekExpress automated test framework is the fastest D-PHY compliance solution on the market, providing significant test time savings, especially when characterizing DUT performance under a wide range of environmental conditions. The solution can also test offline waveforms in pre-recorded mode, where multiple rounds of data can be captured and processed later, saving time and effort.

The reporting function supports multiple formats and customized content. Results can be grouped by test name (default), path name, or test result. An image of the first analysis area can be included as an option. The report provides not only a test pass/fail summary table, but also margin details for each test, which are included in one consolidated report and can be exported.

MIPI D-PHY physical layer automatic compliance test

Figure 5. The TekExpress D-PHY automation software guides the user through the test from setup to report.

Automated compliance testing is much faster and more repeatable than manual testing, especially when testing the MIPI D-PHY physical layer. TekExpress automation software combined with corresponding oscilloscopes and probes, such as the 6 Series MSO and TDP7700, can help engineers speed up testing, improve repeatability, and simplify reporting.

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Author: Yoyokuo