Worried about the insulation capability of the gate driver?Take the BIER test

It is well known that the current MOSFETs and trench IGBTs on the market can also work in circuits with higher dV/dt and di/dt. However, the latest wide-bandwidth (WBG) semiconductors enable high-voltage and low-loss ultra-fast switching. The most ideal state. However, the fast switching in the low-side arm circuit will couple the transient voltage to the gate drive circuit, resulting in distortion or damage to the driving waveform. At the same time, the signal and isolated power supply of the high-side gate driver will also be affected by stress. This article will explore these effects, explain how to avoid these effects, and evaluate the results of experiments on the insulation degradation caused by voltage stress and partial discharge (PD).

It is well known that the current MOSFETs and trench IGBTs on the market can also work in circuits with higher dV/dt and di/dt. However, the latest wide-bandwidth (WBG) semiconductors enable high-voltage and low-loss ultra-fast switching. The most ideal state. However, the fast switching in the low-side arm circuit will couple the transient voltage to the gate drive circuit, resulting in distortion or damage to the driving waveform. At the same time, the signal and isolated power supply of the high-side gate driver will also be affected by stress. This article will explore these effects, explain how to avoid these effects, and evaluate the results of experiments on the insulation degradation caused by voltage stress and partial discharge (PD).

Modern semiconductors and MOSFETs using Wide Gigabit Band (WBG) technology, as well as IGBTs, can achieve extremely fast switching. Its advantage is that it reduces the power consumption of switching under high-frequency switching conditions, and at the same time obtains passive components with high efficiency, high power density, and smaller size. However, his disadvantage is that high dV/dt and di/dt will increase the EMI and stress of the gate drive insulation system. Figure 1 shows a typical gate drive circuit of an IGBT. A positive voltage is applied between 5V and 20V to turn on the device, and 0V to turn it off. This circuit is also very suitable for enhanced Si MOSFET and WBG devices in SiC and GaN technology; in all cases, the device is guaranteed to be turned off when 0V is continuously applied to the gate.

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 1: Basic gate drive circuit

However, as shown in Figure 2, parasitic capacitance and inductance will cause a series of problems when the device switches quickly.

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 2: Gate driver with parasitic parameters

If take di/dt as an example, the drain-source current is 10A/ns (this is possible in the most advanced GaN), and the source parasitic inductance is 15nH. According to V = – L di/dt, 150V will appear across the Inductor. At the moment of turn-off, the voltage reversely drives the source to the negative electrode, which is opposite to the gate drive, and when it is turned on, the direction is positive, again opposite to the gate drive. This may reduce the efficiency, and the incompletely turned on state may even cause the breakdown of the switch tube and cause damage. The assumed 15nH may seem large, but the corresponding PCB trace is actually only 25mm. Even PCB vias will generate 1.2nH inductance, which is a 12V transient voltage. In the case of high di/dt, it is practical to connect only the chip size package to the gate and source of the gate drive in Kelvin. Applying a negative voltage in the off state to turn off the gate can be a good help to the unavoidable parasitic inductance.

In actual circuits, such as push-pull or full-bridge topology in inverter or motor control, the source and gate drive currents of the two low-side switch tubes usually share the same loop, as shown in Figure 3. .

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 3: Parasitic parameters when the lower-arm switch tube uses a common ground

Kelvin connections cannot be used now because the two drives each have their own circuits. The grounds of the two drivers and the two power grounds (sources) must be connected together. If this connection is close to the power ground of the left switch, Powergnd 1, then the right switch will have a larger trace inductance than the left, which will lead to failures. Symmetry, it is possible to generate potential EMI and damage to the device caused by the induced voltage across the inductor. If you want to be symmetrical, Powergnd 2 is the only choice, but the two sources have the same and larger trace inductance in the gate drive loop, so this is not an appropriate compromise, especially when high-power power supplies The equipment of the system is not connected together.
The solution is to use two gate drivers to provide power for the isolated signal, as shown in Figure 4. After isolation, the driver signal and power circuit can be directly connected to the respective power ground-the source of the switch tube, so that most of the parasitic inductance in the drive loop is not included in the circuit.

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 4: Using Kelvin connection to isolate the gate drive signal, isolate the power supply and parasitic parameters

The challenge of the upper bridge arm switch
The configuration of Figure 4 solves the problem of gate voltage transients caused by the parasitic inductance of the emitter (source) of the switch tube caused by di/dt. This is a typical and very representative analysis of parasitic parameters. It is usually also used for the switching tubes of the two upper arms of the H-bridge. The two gate drive circuits are actually a switch node with the same point opposite to each other. Isolated from each other. In the driving of the upper bridge arm, the high switching voltage that appears on the gate drive isolation device may cause other problems. According to I = C dV/dt, the high dV/dt may be a problem caused by the displacement current generated by the isolation capacitor. Since the rising or falling edge rate can easily reach 100V/ns, the 10pF barrier capacitor may allow 1 ampere of current to pass and form a loop in the primary circuit of the gate drive circuit, which may cause abnormal working conditions.

The gate drive signal isolation device is usually an optocoupler or a transformer, and sometimes capacitive coupling is also used. Table 1 shows the key parameters of isolated gate driver ICs. Among them are the Common Mode Transient Immunity (CMTI), which is most relevant to our high dV/dt circuit. However, this value is the data measured in the laboratory, and it is likely to be a single pulse. There is no mention of reliability under continuous high voltage and high dV/dt waveforms.

Worried about the insulation capability of the gate driver?Take the BIER test

Table 1: Key parameters of isolated gate drive

Other VIORM/VIOWM/VIOTM/VPR parameters are also very important, but they are not directly related to our switching circuit because the standard test is usually set to 50/60Hz AC voltage, or DC peak voltage. Gate drive transformers have similar requirements, usually only one second or one minute, DC or 50/60Hz AC voltage Hi-pot test. However, it is very rare to apply a high-frequency switching voltage to the winding or CMTI to determine the reliability. For transformers, the method of obtaining high isolation varies from application to application; enameled wire can be subjected to Hi-pot test alone but it is not reliable because there will be pinholes in a certain distance. Of course, safety agencies do not consider such enameled wires to be safe. Wires with better insulation, such as “triple insulated wires”, can be recognized by safety agencies, but they are too bulky, resulting in relatively high coupling capacitance and displacement current in the transformer. Moreover, due to the effect of partial discharge (PD) between layers, the performance of triple insulated wires under high switching voltages is not an ideal choice. To meet the requirements of safety agencies, the ideal structure is that the windings are separated from each other, with sufficient space in the middle, providing low interlayer capacitance between the windings, and meeting the requirements of safety testing without relying on solid materials that may cause partial discharges. As shown in Figure 5.

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 5: The windings of the gate drive transformer are separated from each other

The same considerations also apply to the transformer inside the isolated gate drive power supply. CMTI is often overlooked, and high-voltage isolation is often displayed in various ways.

Partial discharge effects
Earlier, we have already mentioned partial discharge (PD), which is a phenomenon in which solid insulating materials slowly deteriorate after being subjected to high voltage stress. This phenomenon is caused by the continuous destruction of the micropores of the material. If it is an organic material, the plasma will cause carbonization. The void causes a permanent short circuit, which reduces the overall insulation thickness, thereby generating a stronger voltage field on the remaining insulation layer, and ultimately leading to complete failure. The PD effect starts suddenly at the “onset” voltage, which depends on the gas, pressure, and size of the gap in the Paschen curve.[1]As a feature. If it is a switching voltage, the starting voltage will be determined by the frequency.

In addition, the breakdown voltage of the material should not be completely believed. For example, glass is considered an excellent insulator, with a breakdown voltage of about 60 kV/mm, but this is at a frequency of 60 Hz. If the frequency is 1MHz, the value of the insulation breakdown voltage is attenuated to one-tenth, which is about 5kV/mm.For some insulation spacings
Therefore, the peak value of the switching voltage, dV/dt and frequency are the key parameters for evaluating insulation reliability. Transient voltage caused by overshoot and resonance of parasitic capacitance and inductance should also be added to the system voltage for evaluation.

Barrier insulation evaluation and research
Gate drive power supply manufacturer RECOM [2]It has been known that the transformer of the DC-DC converter will have potential problems when switching under high industrial-mode voltage, and it has been with Technische Universität Graz and FH Johanneum University’s insulation materials expert Priv.-Doz. Dipl.-Ing. Dr.techn. Christof Sumereder conducts research together. The internal code of this project is BIER (abbreviation for Barrier Insulation Evaluation and Research), which includes the evaluation of 30 half-bridge topology upper and lower arm switches, as shown in Figure 6. Table 2 shows three different configurations working at 70°C for 1464 hours, with a DC voltage of 1000V, a switching frequency of 50kHz, and a rising and falling edge rate of 65kV/μs.

Worried about the insulation capability of the gate driver?Take the BIER test

T1 is not included in the test

Figure 6: PD test evaluation circuit diagram

Worried about the insulation capability of the gate driver?Take the BIER test

Table 2: BIER test configuration

The partial discharge voltage value was measured once before and after the test, and the performance did not decrease significantly (Figure 7). The PD (Partial Discharge) starting voltage is maintained at twice the peak voltage of the applied switch, indicating a good margin and good long-term reliability.For the complete report, please visit the RECOM website[3].

Worried about the insulation capability of the gate driver?Take the BIER test

Figure 7: PD assessment results

in conclusion
In push-pull and bridge circuits, the gate drive signal and power loop are isolated, and the problem of voltage transients between the upper and lower bridge arms coupled to the gate is solved. However, under high frequency and high slew rate, the isolation device of the upper bridge arm still bears very high common-mode voltage stress. The actual partial discharge test shows that the isolation device of the gate drive DC/DC power supply can be designed to ensure good long-term reliability.
RECOM offers various series of DC/DC converters with output voltage and isolation ratings suitable for upper and lower arm gate drive applications of IGBT, SiC and GaN technologies.

The Links:   LQ9D340H CM100DU-12F-300G

Author: Yoyokuo